Keith Graham appointed Head of University Program Munich, 10 March 2022 – Codasip, the leader in processor design automation, has launched a University Program to help the next generation of processor engineers to Design for Differentiation and to solve tomorrow’s technological challenges. The Program augments graduate and undergraduate computer engineering curriculums with materials and assignments, and by granting access to industry-grade Codasip RISC-V custom development tools and CodAL high-level synthesis language. Access to Codasip Studio development tools and CodAL development language, plus specific technologies will enable Codasip University Program partners…
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Codasip’s latest RISC-V embedded cores enable AI/ML edge customization
Munich, 24 February 2022 – Codasip, the leader in processor design automation, today announced the L31 and L11, the latest in its range of low power embedded RISC-V processor cores optimized for customization. With the new cores, customers can more easily customize processor designs using Codasip Studio tools to support challenging tasks such as neural networks (AI/ML) even in the smallest, power-constrained applications – such as IoT edge. It is very beneficial for AI/ML to run in edge IoT/IIoT devices in order to improve security and power consumption, and to…
Read MoreIAR Systems and Codasip collaborate to enable low-power RISC-V based applications
The professional development tools IAR Embedded Workbench for RISC-V now support Codasip’s low-power embedded processors Uppsala, Sweden and Munich, Germany – 30 November 2021– IAR Systems®, the world leader in software tools and services for embedded development, and Codasip, the leading supplier of customizable RISC-V processor IP, today announced their partnership enabling joint customers to build low-power embedded applications based on RISC-V. Following this, version 2.11 of IAR Embedded Workbench® for RISC-V now supports the L30 and L50 processors from Codasip. The L30 and L50 are small and energy-efficient low-power…
Read MoreCodasip Adopts Imperas for RISC-V Processor Verification
Oxford, United Kingdom & Munich, Germany – 22 November 2021 – Imperas Software Ltd., the leader in verification solutions for RISC-V, and Codasip, the leader in customizable RISC-V processor IP, today announced that Codasip has adopted Imperas reference designs and the Imperas DV solution for Codasip IP. Codasip has invested heavily into processor verification to deliver the industry’s highest quality RISC-V processors. Codasip has included Imperas golden reference models in its DV testbenches to ensure an efficient verification flow that accommodates a wide range of flexible features and options while…
Read MoreCodasip Expands Ecosystem with XtremeEDA
Design Partner Supports Full Codasip Portfolio Munich Germany, 4 November 2021 – Codasip, the leading supplier of customizable RISC-V processor IP, today announced that it has signed XtremeEDA – a Design and Functional Verification services to the ASIC, SoC, and FPGA hardware industry – as a Codasip Certified Design Services Company. This means it will enlarge the experienced engineering resources available to support Codasip customers with their custom RISC-V processor designs. The dedicated Codasip team at XtremeEDA is trained in Codasip’s Studio processor design tools and CodAL. As a Codasip…
Read MoreCodasip Founder Karel Masařík Elected to RISC-V Technical Steering Committee
Munich Germany, October 28, 2021 – Codasip, the leading supplier of customizable RISC-V processor IP, today announced that Dr Karel Masařík, company founder responsible for the development of Codasip’s core technology, has been elected to the RISC-V Technical Steering Committee (TSC) by RISC-V International Strategic members. The Technical Steering Committee (TSC) is the overriding technical governance body within RISC-V and is made up of task group chairs and Premier members, reporting directly to the Board of Directors. RISC-V organizes its technical work through standing committees which guide the work done…
Read MoreCodasip Boosts Studio Processor Design Tools with AXI Automation
Munich Germany, October 26, 2021 – Codasip, the leading supplier of customizable RISC-V processor IP, today announced further enhancements to its Studio processor design toolset. New features in Studio 9.1 include an expanded bus support with full AXI for high-performance designs, as well as improved support for LLVM and improved code density. Studio is at the heart of Codasip’s offering to simplify the task of customizing designs, enabling companies of all sizes to differentiate their products at the core. Studio has been the market leader in democratizing processor design since…
Read MoreCodasip opens UK Design Center led by Simon Bewick
Over one hundred engineers to be hired in multiple locations Munich Germany, September 21st, 2021 – Codasip, the leading supplier of customizable RISC-V processor IP, announced today that it is opening offices in Bristol and Cambridge and is looking to hire over one hundred engineers over the coming quarters. The new design center will be headed by newly appointed Director of the UK Design Center, Simon Bewick, an experienced semiconductor industry executive who recently joined Codasip’s management supervisory board. Although opening two initial offices in the UK, Codasip supports fully…
Read MoreCodasip Strengthens Senior Leadership Team
Rupert Baines Joins As Chief Marketing Officer Munich, Germany – September 9, 2021 – Codasip, the leading supplier of customizable RISC-V processor IP and tools, announced today that semiconductor industry veteran Rupert Baines has joined the company as Chief Marketing Officer and member of the management supervisory board. Mr. Baines was most recently Chief Executive Officer of UltraSoC, a UK-based provider of semiconductor IP and analytics solutions that put intelligent monitoring, cybersecurity, and functional safety capabilities into the core hardware of system-on-chips (SoCs). The company, based in Cambridge, was sold…
Read MoreMythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor
Munich, Germany – August 10th, 2021 – Codasip, the leading supplier of customizable RISC-V® embedded processor IP, announced today that Mythic, the pioneering AI processor company with breakthrough analog compute-in-memory technology, has selected Codasip’s L30 (originally Bk3) RISC-V-based core for Mythic’s next generation Analog Matrix Processor (Mythic AMP™). Mythic uses Codasip RISC-V cores in its revolutionary new M1076 Mythic AMP™, which delivers best-in-class performance, scalability, and power efficiency. Mythic’s Analog Matrix Processor is designed with an array of tiles, and each contains: a large Analog Compute Engine (ACE) to store…
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