Munich Germany, October 28, 2021 – Codasip, the leading supplier of customizable RISC-V processor IP, today announced that Dr Karel Masařík, company founder responsible for the development of Codasip’s core technology, has been elected to the RISC-V Technical Steering Committee (TSC) by RISC-V International Strategic members.
The Technical Steering Committee (TSC) is the overriding technical governance body within RISC-V and is made up of task group chairs and Premier members, reporting directly to the Board of Directors. RISC-V organizes its technical work through standing committees which guide the work done by task groups and technical special interest groups (SIGs).
Karel Masařík commented on his selection, “My involvement with RISC-V goes back to 2016 when Codasip became a founding member of the RISC-V Foundation and announced its first RISC-V IP core. I am honored to be chosen to now represent Strategic members and to continue to play a driving role in the future evolution of RISC-V. I am keen to see further deployment of RISC-V in the industry and further development of the ecosystem in areas of common interest”.
Leading up to his work on RISC-V, Dr Masařík undertook research in the use of architecture description languages and design automation at Brno University of Technology. This included research into hardware/software co-design, compilers, high level synthesis as well functional verification of processor designs. He achieved a Ph.D. in Computer Science in 2008.
He then led the development of Codasip’s underlying technologies as part of a university technology incubator and founded Codasip in 2014. Codasip launched its processor development toolset, Codasip Studio, in 2014 and announced its first RISC-V processor core at the start of 2016. He has led the company through its seed funding round in 2014, series a round in 2018 and has overseen its continued international expansion.