ISO 26262-certified tools from IAR support reference design based on the award-winning Codasip L31 core embedded world, Nuremberg, Germany, 14 March 2023 – Codasip and IAR deliver new possibilities for low-power embedded automotive applications through the award-winning Codasip L31 core and the safety-certified version of the development toolchain IAR Embedded Workbench for RISC-V. The collaboration demonstrates a path for automotive developers to launch ISO 26262-qualified embedded applications based on the versatile Codasip L31 core. Codasip’s dual-core lockstep reference design implements two Codasip L31 cores in a dual-core fault detection subsystem….
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Codasip delivers custom RISC-V processing to SiliconArts ray-tracing GPUs
With Codasip 7-series core IP and Codasip Studio tools Munich, Germany; Seoul, South Korea – 2 November 2022 – Codasip, the leader in customizable RISC-V processor IP, today announced that SiliconArts has adopted application-specific Codasip 7-series RISC-V processors with Codasip Studio customization tools. SiliconArts is a leader in innovations for high-end graphics enabling immersive experiences with its photo-realistic ray tracing graphics rendering. The combination of Codasip RISC-V processor IP and SiliconArts ray tracing GPUs will empower the next generation of the most demanding augmented reality applications. SiliconArts ray tracing solution…
Read MoreCodasip joins OpenHW® Group to contribute to RISC-V verification
Munich, Germany, 21 September 2022 – Codasip, the leader in customizable RISC-V processor IP, announced it has joined OpenHW Group. Together with the existing OpenHW ecosystem, Codasip will contribute to the development of standards across various techniques including formal verification. Codasip will contribute supporting IP, tools, and methodologies to help the wider community benefit from its experience in the development of high-quality, standard and customized RISC-V cores. OpenHW Group transforms the development of microprocessor technology and related sub-systems peripherals through a collaborative, distributed engineering, open-source ecosystem. A non-profit global organization…
Read MoreCodasip joins Intel Pathfinder for RISC-V program
Munich, Germany, 31 August 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today announced that it would make its 32-bit L31 core available through the Professional Edition of the Intel® Pathfinder for RISC-V* program. By joining the program, Codasip is making its award-winning embedded RISC-V technology more accessible for prototyping, production design or research purposes using Intel FPGAs. Particularly in the early stages of the SoC development cycle, it is beneficial to undertake architectural exploration and to explore different configurations and combinations of IP. The…
Read MoreCodasip expands design team to Greece
Munich, Germany, 12 July 2022 – Codasip, the leader in customizable RISC-V processor IP, today announced the company’s rapid growth was continuing apace with the opening of a new design facility in Greece. To lead the team, Codasip has appointed Giorgos Nikiforos as Director of the Codasip Greece Design Center which is expected to engage a significant number of engineers between its locations in Athens, Thessaloniki and Crete. Giorgos Nikiforos brings decades of engineering experience in hardware design and in system verification at Intel, Broadcom and most recently with Apple…
Read MoreCodasip Studio Mac extends potential to design for differentiation with RISC-V
Munich, Germany, 21 June 2022 — Codasip, the leader in customizable RISC-V processor IP, today announced that its Codasip Studio platform is now available to support Apple macOS Monterey (the current major release of macOS). Codasip Studio is an automated platform for customization of Codasip’s leading RISC-V processor IP, enabling designers to quickly and easily tailor their processor designs to achieve the highest performance in domain specific applications. Codasip Studio is used to create Codasip’s best-in-class RISC-V processor cores and to help designers evaluate microarchitectural alternatives. Application software can be…
Read MoreCodasip adopts Siemens’ OneSpin tools for formal verification
Higher-quality verification to drive adoption and build momentum for RISC-V IP Munich, 3 May 2022 – Codasip, the leader in processor design automation, has expanded its adoption of formal verification solutions for comprehensive and thorough processor testing with the addition of OneSpin IC verification tools from Siemens EDA. Codasip has continually invested heavily in processor verification to underpin the company’s ability to deliver the industry’s highest quality RISC-V processor IP. Siemens EDA’s OneSpin tools provide an advanced and incredibly robust verification platform to tackle critical IC integrity issues. The highly…
Read MoreCodasip University Program spurs innovation and boosts curriculums
Keith Graham appointed Head of University Program Munich, 10 March 2022 – Codasip, the leader in processor design automation, has launched a University Program to help the next generation of processor engineers to Design for Differentiation and to solve tomorrow’s technological challenges. The Program augments graduate and undergraduate computer engineering curriculums with materials and assignments, and by granting access to industry-grade Codasip RISC-V custom development tools and CodAL high-level synthesis language. Access to Codasip Studio development tools and CodAL development language, plus specific technologies will enable Codasip University Program partners…
Read MoreCodasip’s latest RISC-V embedded cores enable AI/ML edge customization
Munich, 24 February 2022 – Codasip, the leader in processor design automation, today announced the L31 and L11, the latest in its range of low power embedded RISC-V processor cores optimized for customization. With the new cores, customers can more easily customize processor designs using Codasip Studio tools to support challenging tasks such as neural networks (AI/ML) even in the smallest, power-constrained applications – such as IoT edge. It is very beneficial for AI/ML to run in edge IoT/IIoT devices in order to improve security and power consumption, and to…
Read MoreIAR Systems and Codasip collaborate to enable low-power RISC-V based applications
The professional development tools IAR Embedded Workbench for RISC-V now support Codasip’s low-power embedded processors Uppsala, Sweden and Munich, Germany – 30 November 2021– IAR Systems®, the world leader in software tools and services for embedded development, and Codasip, the leading supplier of customizable RISC-V processor IP, today announced their partnership enabling joint customers to build low-power embedded applications based on RISC-V. Following this, version 2.11 of IAR Embedded Workbench® for RISC-V now supports the L30 and L50 processors from Codasip. The L30 and L50 are small and energy-efficient low-power…
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