Oxford, United Kingdom & Munich, Germany – 22 November 2021 – Imperas Software Ltd., the leader in verification solutions for RISC-V, and Codasip, the leader in customizable RISC-V processor IP, today announced that Codasip has adopted Imperas reference designs and the Imperas DV solution for Codasip IP. Codasip has invested heavily into processor verification to deliver the industry’s highest quality RISC-V processors. Codasip has included Imperas golden reference models in its DV testbenches to ensure an efficient verification flow that accommodates a wide range of flexible features and options while…
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UltraSoC embedded analytics and Imperas virtual platforms combine to enhance multicore development and debug
Advanced debug environment for multicore processor designs used for both hardware and simulation Cambridge, UK – 21 June 2018 / DAC, San Francisco: UltraSoC and Imperas today announced a wide-ranging partnership that will provide developers of multicore systems on chip (SoCs) with a powerful combination of embedded analytics and virtual platform technologies. Under the terms of the agreement, UltraSoC will incorporate key elements of Imperas’ development environment into its tools offering, giving designers a unified system-level pre- and post-silicon development flow, dramatically reducing time-to-revenue and overall development costs. UltraSoC delivers…
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