J-Link probes support RISC-V, Arm and other CPU platforms Cambridge, UK and Hilden, Germany – 1 August 2018 – UltraSoC today announced that it has partnered with SEGGER to offer support for J-Link debug probes within UltraSoC’s integrated system on chip (SoC) monitoring and analytics environment. SEGGER’s J-Link probes are amongst the industry’s most widely-used and support the debug of popular processor platforms including RISC-V, and both current and legacy Arm cores. The partnership gives SoC developers easy access to J-Link via a single interface when debugging using UltraSoC’s flexible…
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Quortus joins Airspan, ARM, McLaren in AutoAir 5G automotive & transportation project
Selected as part of UK Government 5G Testbeds and Trials project Camberley, UK, 20 March 2018 – Quortus today announced its participation in AutoAir, an ambitious project designed to develop 5G cellular technology for connected and autonomous vehicles (CAVs). Earlier this month, the UK Government’s Department for Digital, Culture, Media & Sport (DCMS) announced that AutoAir, which is led by Airspan Networks and includes ARM, Blu Wireless and McLaren, has been selected as part of its 5G Testbeds and Trials project. The 5G technologies developed as part of AutoAir will…
Read MoreUltraSoC embedded analytics selected by ELVEES for video, security and safety applications across ARM and MIPS platforms
First win for Nautech, UltraSoC’s new partner in Russia CAMBRIDGE, United Kingdom, 1 November 2017 – UltraSoC today announced that ELVEES has licensed UltraSoC’s embedded analytics technology for use in its next-generation video processing offerings. The new ELVEES system on chip (SoC) product will provide advanced capabilities for a broad range of applications, from automotive safety and ADAS (advanced driver assistance systems), to facial recognition, augmented/virtual reality and vision based IoT systems. This is the second time that ELVEES, a leading provider of world-class semiconductor products with heterogeneous multicore SoC…
Read MoreUltraSoC delivers industry’s first debug and analytics solution for ARM’s AMBA 5 CHI Issue B coherency architecture
UltraSoC to present on coherent design at ARM TechCon 2017 CAMBRIDGE, United Kingdom, 2 August 2017 UltraSoC, the leading developer of embedded analytics technology, today announced the general availability of full debug and monitoring IP for ARM’s recently announced AMBA 5 Coherent Hub Interface (CHI) Issue B. UltraSoC is the only monitoring and debug product capable of addressing the needs of designers using CHI Issue B, which is ARM’s most advanced bus specification for complex system-on-chip (SoC) designs. Delivered as semiconductor IP, UltraSoC’s monitoring and debug solution enables reliable testing…
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